Freescale Semiconductor /MK53D10 /SIM /SCGC1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SCGC1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)UART4 0 (0)UART5 0 (0)OPAMP 0 (0)TRIAMP

TRIAMP=0, UART4=0, OPAMP=0, UART5=0

Description

System Clock Gating Control Register 1

Fields

UART4

UART4 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

UART5

UART5 Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

OPAMP

OPAMP Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

TRIAMP

TRIAMP Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

Links

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